EP9592(K) is a Low Power HDMI/MHL dual mode transmitter with MIPI-DSI input. The chip is compliant with MIPI-DSI 1.02.00, HDMI 1.4, MHL 2.1 and HDCP 1.4 specifications. The chip converts input video data in 3-lane MIPI-DSI format and audio data in IIS or SPDIF format into HDMI/MHL differential signals. The chip supports 8-bit video input up-to 1080p 60Hz in RGB or YCC444. The chip supports 8-bit video output up-to 1080p 60Hz. 3D video is also supported. The chip also integrates USB/MHL MUX on chip to ease system design and save cost.
•MIPI-DSI Specification 1.02.00 Compliant
•HDMI Specification 1.4 Compliant
•MHL Specification 2.1 Compliant
•HDCP Specification 1.4 Compliant
•On-chip HDCP encryption engine with/without integrated HDCP Keys.
•On-chip USB/MHL MUX
•Wide Pixel Clock Frequency Range: 25MHz – 150MHz
•Support 3-Lane MIPI_DSI input up to 1.2 Gbps per lane.
•Support MHL output up to 3.0 Gbps.
•Support 8-bit video input up-to 1080p 60Hz in RGB or YCC444.
•Support 8-bit video output up-to 1080p 60Hz.
•Support RGB to YCC444, RGB to YCC422 and YCC444 to YCC422 conversions.
•Programmable DE/HSYNC/VSYNC generation
•Support 3D video
•Supports x2, x4 and x8 Pixel Repetition
•Support 1 port of SPDIF audio input (without the need for system clock) and 2 channels of IIS audio inputs
•Supports audio down sampling at 1/2, 1/3 or 1/4 sampling rate for both SPDIF and IIS
•Support auto-send for DVI, ADO, ACR (Audio Clock Regeneration) and General Control packets.
•Support 2 Generic Data Packet buffers
•IIC Slave Programming Interface
•Supports Receiver Connection Detection
•Supports Power Down Mode
•3.3V and 1.8V power required
•64-pin LQFP in 7mm x 7mm body size